High performance computing mcq Unit 1

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high performance computing mcq questions and answers

1. Which is the type of Microcomputer Memory

  1. Address
  2. Contents
  3. Both a and b
  4. none
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Both a and b

2. A collection of lines that connects several devices is called

  1. Bus
  2. Peripheral connection wires
  3. Both a and b
  4. internal wires
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Bus

3. Conventional architectures coarsely comprise of a

  1. Processor
  2. Memory System
  3. Data path
  4. All of the above
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All of the above

4. VLIW processors rely on

  1. Compile time analysis
  2. Initial time analysis
  3. Final time analysis
  4. id time analysis
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Compile time analysis

5. HPC is not used in high span bridges

  1. True
  2. False
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False

6. The access time of memory is …………… the time required for performing any single CPU operation.

  1. longer than
  2. shorter than
  3. negligible than
  4. same as

longer than

7. Data intensive applications utilize_

  1. High aggregate throughput
  2. High aggregate network bandwidth
  3. high processing and memory system performance
  4. none of above
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High aggregate throughput

8. Memory system performance is largely captured by_

  1. Latency
  2. bandwidth
  3. both a and b
  4. none of above

both a and b

9. A processor performing fetch or decoding of different instruction during the execution of another instruction is called __ .

  1. Super-scaling
  2. Pipe-lining
  3. Parallel Computation
  4. none of above
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Pipe-lining

10. For a given FINITE number of instructions to be executed, which architecture of the processor provides for a faster execution ?

  1. ISA
  2. ANSA
  3. Super-scalar
  4. All of the above

Super-scalar

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11. HPC works out to be economical.

  1. True
  2. false

True

12. High Performance Computing of the Computer System tasks are done by

  1. Node Cluster
  2. Network Cluster
  3. Beowulf Cluster
  4. Stratified Cluster

Beowulf Cluster

13. Octa Core Processors are the processors of the computer system that contains

  1. 2 Processors
  2. 4 Processors
  3. 6 Processors
  4. 8 Processors
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8 Processors

14. Parallel computing uses _ execution

  1. sequential
  2. unique
  3. simultaneous
  4. None of above

simultaneous

15. Which of the following is NOT a characteristic of parallel computing?

  1. Breaks a task into pieces
  2. Uses a single processor or computer
  3. Simultaneous execution
  4. May use networking
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Uses a single processor or computer

16. Which of the following is true about parallel computing performance?

  1. Computations use multiple processors
  2. There is an increase in speed
  3. The increase in speed is loosely tied to the number of processor or computers used
  4. All of the answers are correct.

All of the answers are correct.

17. __ leads to concurrency.

  1. Serialization
  2. Parallelism
  3. Serial processing
  4. Distribution

Parallelism

18. MIPS stands for?

  1. Mandatory Instructions/sec
  2. Millions of Instructions/sec
  3. Most of Instructions/sec
  4. Many Instructions / sec
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Millions of Instructions/sec

19. Which MIMD systems are best scalable with respect to the number of processors

  1. Distributed memory computers
  2. ccNUMA systems
  3. Symmetric multiprocessors
  4. None of above

Distributed memory computers

high performance computing mcq questions

20. To which class of systems does the von Neumann computer belong?

  1. SIMD (Single Instruction Multiple Data)
  2. MIMD (Multiple Instruction Multiple Data)
  3. MISD (Multiple Instruction Single Data)
  4. SISD (Single Instruction Single Data)

SISD (Single Instruction Single Data)

21. Which of the architecture is power efficient?

  1. CISC
  2. RISC
  3. ISA
  4. IANA

RISC

22. Pipe-lining is a unique feature of _.

  1. RISC
  2. CISC
  3. ISA
  4. IANA
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RISC

23. The computer architecture aimed at reducing the time of execution of instructions is __.

  1. RISC
  2. CISC
  3. ISA
  4. IANA

RISC

24. Type of microcomputer memory is

  1. processor memory
  2. primary memory
  3. secondary memory
  4. All of above
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All of above

25. A pipeline is like_

  1. Overlaps various stages of instruction execution to achieve performance.
  2. House pipeline
  3. Both a and b
  4. A gas line

Overlaps various stages of instruction execution to achieve performance.

High Performance Computing mcq pdf

26. Scheduling of instructions is determined_

  1. True Data Dependency
  2. Resource Dependency
  3. Branch Dependency
  4. All of above

All of above

27. The fraction of data references satisfied by the cache is called_

  1. Cache hit ratio
  2. Cache fit ratio
  3. Cache best ratio
  4. none of above

Cache hit ratio

28. A single control unit that dispatches the same Instruction to various processors is__

  1. SIMD
  2. SPMD
  3. MIMD
  4. none of above
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SIMD

29. The primary forms of data exchange between parallel tasks are_

  1. Accessing a shared data space
  2. Exchanging messages.
  3. Both A and B
  4. none of above

Both A and B

30. Switches map a fixed number of inputs to outputs.

  1. True
  2. False
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True

Data Analytics sppu mcq

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